Intel Central Processing Unit part #: HW8076503693501S R3JX | CPU | DEX

Intel Central Processing Unit part #: HW8076503693501S R3JX

Feature Summary

• Machine Check Architecture (MCA) implemented which provides MCA Bank registers for Core, L2 Cache, System Agent, Memory Controller, and Power-Management Unit.
• Error Cloaking and Dual Signaling (MSR 52h) to optionally hide errors from the operating system
• Corrected Machine-Check error Interrupt (CMCI) that eliminates polling by generating a local interrupt based on programmable threshold values for accumulated MCA corrected errors
• Parity-protected internal data paths of the System Agent circuitry and the interface between the System Agent and the processor cores/L2-cache.
• Parity-protected command and data for the internal I⁄O system fabric. Parity errors are logged
• Memory Controllers supports ECC, data scrambling, patrol scrubbing and demand scrubbing
• Advanced Error Reporting (AER) supported which provides OS-level error recovery form system errors and also system debug:
• PCI Express* Root Ports
• Root Complex Integrated Endpoints: SMBus-Host function; Global/Local Integrated Error Handler (IEH) function
• Integrated LAN Controllers
• Integrated Intel QuickAssist Technology (Intel QAT) Controller
• PCI Express* Root Ports (but not the Virtual Root Ports)

ITL:HW8076503693501S R3JX

HW8076503693501S R3JX