{"product_id":"micron-technology-dram-part-mt61k512m32kpa-16-c-tr-dynamic-random-access-memory-dex","title":"Micron Technology DRAM SDRAMMobile, Part #MT61K512M32KPA-16:C TR | Dynamic random access memory | DEX","description":"\u003cp\u003eMicron Technology DRAM , MT61K512M32KPA-16:C TR\u003c\/p\u003e\n\u003cp\u003eFeatures\u003c\/p\u003e\n\u003cul\u003e\n\u003cli\u003eVDD = VDDQ = 1.35V ±3% and 1.25V ±3%\u003c\/li\u003e\n\u003cli\u003eVPP = 1.8V –3%\/+6%\u003c\/li\u003e\n\u003cli\u003eData rate: 14 Gb\/s, 16 Gb\/s\u003c\/li\u003e\n\u003cli\u003e2 separate independent channels (x16)\u003c\/li\u003e\n\u003cli\u003ex16\/x8 and 2-channel\/pseudo channel (PC) mode configurations set at reset\u003c\/li\u003e\n\u003cli\u003eSingle ended interfaces per channel for command\/ address (CA) and data\u003c\/li\u003e\n\u003cli\u003eDifferential clock input CK_t\/CK_c for CA per 2 channels\u003c\/li\u003e\n\u003cli\u003eTwo differential clock inputs WCK_t\/WCK_c per channel for data (DQ, DBI_n, EDC)\u003c\/li\u003e\n\u003cli\u003eDouble data rate (DDR) command\/address (CK)\u003c\/li\u003e\n\u003cli\u003eQuad data rate (QDR) and double data rate (DDR) data (WCK), depending on operating frequency\u003c\/li\u003e\n\u003cli\u003e16n prefetch architecture with 256 bits per array read or write access\u003c\/li\u003e\n\u003cli\u003e16 internal banks\u003c\/li\u003e\n\u003cli\u003e4 bank groups for tCCDL = 3tCK and 4tCK\u003c\/li\u003e\n\u003cli\u003eProgrammable READ latency\u003c\/li\u003e\n\u003cli\u003eProgrammable WRITE latency\u003c\/li\u003e\n\u003cli\u003eWrite data mask function via CA bus with single and double byte mask granularity\u003c\/li\u003e\n\u003cli\u003eData bus inversion (DBI) and CA bus inversion (CABI)\u003c\/li\u003e\n\u003cli\u003eInput\/output PLL\u003c\/li\u003e\n\u003cli\u003eCA bus training: CA input monitoring via DQ\/ DBI_n\/EDC signals\u003c\/li\u003e\n\u003cli\u003eWCK2CK clock training with phase information via EDC signals\u003c\/li\u003e\n\u003cli\u003eData read and write training via read FIFO (depth = 6)\u003c\/li\u003e\n\u003cli\u003eRead\/write data transmission integrity secured by cyclic redundancy check\u003c\/li\u003e\n\u003cli\u003eProgrammable CRC READ latency\u003c\/li\u003e\n\u003cli\u003eProgrammable CRC WRITE latency\u003c\/li\u003e\n\u003cli\u003eProgrammable EDC hold pattern for CDR\u003c\/li\u003e\n\u003cli\u003eRDQS mode on EDC pins\u003c\/li\u003e\n\u003cli\u003eLow power modes\u003c\/li\u003e\n\u003cli\u003eOn‐chip temperature sensor with read‐out\u003c\/li\u003e\n\u003cli\u003eAuto precharge option for each burst access\u003c\/li\u003e\n\u003cli\u003eAuto refresh mode (32ms, 16k cycles) with per-bank and per-2-bank refresh options\u003c\/li\u003e\n\u003cli\u003eTemperature sensor controlled self refresh rate\u003c\/li\u003e\n\u003cli\u003eDigital tRAS lockout\u003c\/li\u003e\n\u003cli\u003eOn‐die termination (ODT) for all high‐speed inputs\u003c\/li\u003e\n\u003cli\u003ePseudo open drain (POD135 and POD125) compatible outputs\u003c\/li\u003e\n\u003cli\u003eODT and output driver strength auto calibration with external resistor ZQ pin (120Ω)\u003c\/li\u003e\n\u003cli\u003eInternal VREF with DFE for data inputs, with input receiver characteristics programmable per pin\u003c\/li\u003e\n\u003cli\u003eSelectable external or internal VREF for CA inputs; programmable VREF offsets for internal VREF\u003c\/li\u003e\n\u003cli\u003eVendor ID for device identification\u003c\/li\u003e\n\u003cli\u003eIEEE 1149.1 compliant boundary scan\u003c\/li\u003e\n\u003cli\u003e180-ball BGA package\u003c\/li\u003e\n\u003cli\u003eLead-free (RoHS-compliant) and halogen-free packaging\u003c\/li\u003e\n\u003cli\u003eTC = 0°C to +95°C\u003c\/li\u003e\n\u003c\/ul\u003e\n\u003cp\u003e \u003c\/p\u003e\n\u003cp\u003eMIL:MT61K512M32KPA-16:C TR\u003c\/p\u003e\n\u003cp\u003eMT61K512M32KPA-16:C TR\u003c\/p\u003e","brand":"Micron Technology","offers":[{"title":"Default Title","offer_id":43011691839687,"sku":"MIL:MT61K512M32KPA-16 C TR","price":32.21,"currency_code":"USD","in_stock":true}],"thumbnail_url":"\/\/cdn.shopify.com\/s\/files\/1\/0480\/2750\/0701\/products\/micron-technology-dram-sdrammobile-part-mt42l32m32d1he-18-aatd-dynamic-random-access-memory-dex-information-technology-micron-technology-605503.jpg?v=1674083904","url":"https:\/\/edexdealstest.myshopify.com\/en-apac\/products\/micron-technology-dram-part-mt61k512m32kpa-16-c-tr-dynamic-random-access-memory-dex","provider":"DEX TEST","version":"1.0","type":"link"}